Semiconductor & Electronics Setup in India: Manufacturing Approval

Setting up a semiconductor or electronics manufacturing unit in India runs across four tracks that have to be sequenced correctly: choosing the right entity structure, filing under the scheme that actually matches your facility type, clearing state land and environmental approvals, and carrying a central government application through appraisal to a signed support agreement. Promoters who treat these as one linear process, or who apply under a scheme that no longer exists, lose months before construction even starts. This guide sequences the setup from incorporation to first disbursement, current to the 2026-27 policy cycle.

What is the fastest way to set up a semiconductor manufacturing unit in India

There is no fast route for a fab or OSAT unit, since central approval passes through technical appraisal, financial appraisal and, for India Semiconductor Mission (ISM) proposals, Union Cabinet clearance. The fastest path runs entity incorporation, state single window clearance and the central Detailed Project Report (DPR) filing concurrently rather than sequentially, since the state file and the central appraisal are cross-referenced before either is finalised.

Fab, compound semiconductor, ATMP/OSAT or component: what are you actually setting up

The scheme, the investment threshold and the approving authority all depend on which segment of the value chain your facility sits in. Conflating these categories in a DPR is the single most common reason project files get sent back for revision.

• Silicon or compound semiconductor fab: wafer fabrication using silicon, gallium nitride (GaN), silicon carbide (SiC) or gallium arsenide (GaAs). Capital-intensive, cleanroom-dependent, and the category with the highest minimum investment threshold.
• Display fab: fabrication of display panels and driver components, evaluated under the same ISM framework as semiconductor fabs.
• ATMP/OSAT unit: Assembly, Testing, Marking and Packaging, or Outsourced Semiconductor Assembly and Test, the back-end process that takes fabricated wafers and turns them into packaged, tested chips. Lower capital intensity and shorter build timelines than a fab.
• Electronic component manufacturing: printed circuit boards, camera and display modules, passive components, sub-assemblies and specialty materials that feed into a finished electronic product, without semiconductor fabrication itself.
• Fabless chip design: no physical manufacturing; design houses that contract fabrication out to a foundry.

Table: manufacturing segment against typical investment scale

Segment	Process involved	Typical build timeline	Indicative investment scale seen so far
Silicon or compound semiconductor fab	Photolithography, etching, ion implantation, metallization	3 to 4 years to commission	₹20,000 crore to ₹91,000 crore
Display fab	Panel fabrication, driver integration	3 to 4 years	Case-specific, comparable to a semiconductor fab
ATMP/OSAT unit	Dicing, wire bonding, packaging, test	18 to 24 months	₹3,000 crore to ₹27,000 crore
Electronic component unit	PCB, module and sub-assembly manufacturing	12 to 24 months	₹10 crore upward (ECMS Segment D)
Fabless design house	Chip and IP design only	Not applicable	Design expenditure basis, no fabrication capex

Choosing the entity structure and FDI route before you file anything

A private limited company incorporated under the Companies Act 2013 is the structure every central scheme and every state single window system expects. An LLP can hold electronic component manufacturing assets but faces friction under ISM and ECMS applications, since both schemes are built around a company that can issue equity, execute a Financial Support Agreement and, where relevant, accept government equity participation capped at 49% of project equity.

Semiconductor and electronics manufacturing sits under the automatic route for 100% foreign direct investment with no sectoral cap (Consolidated FDI Policy, paragraph 5.2.26). This means:

• No prior approval from the Reserve Bank of India (RBI) or any government body is needed for the equity infusion itself, regardless of whether the investor holds 26%, 51% or 100% of the company.
• The obligation is post-facto reporting: filing Form FC-GPR within 30 days of allotment under FEMA 20(R), Regulation 4.
• A foreign company can set up a wholly owned Indian subsidiary specifically to apply under ISM, DLI or ECMS, and the subsidiary applies in its own right, subject to the same technology, financial and demand criteria as any domestic applicant.

Table: entity and FDI checkpoints before filing

Checkpoint	Requirement	Authority
Entity type	Private limited company (public limited for very large fabs planning later listing)	Ministry of Corporate Affairs (MCA)
Foreign shareholding	100% automatic route, no sectoral cap	RBI, post-facto FC-GPR
Minimum paid-up capital	No statutory minimum for a private limited company; scheme minimum investment thresholds apply separately	Companies Act 2013
PAN, TAN, GST	Obtained through the SPICe+ integrated incorporation form	MCA, Income Tax Department, GST authorities
DPIIT startup recognition	Optional; relevant only if applying under DLI’s startup category	Department for Promotion of Industry and Internal Trade (DPIIT)

ISM, DLI or ECMS: matching the scheme to your unit type

Three separate central tracks exist, and a manufacturing unit typically qualifies for only one for a given piece of capital expenditure.

Table: scheme mapping by facility type

Facility type	Applicable scheme	Nodal authority	Fiscal support structure
Silicon or compound semiconductor fab, display fab	India Semiconductor Mission (ISM)	ISM, a business division of Digital India Corporation	Up to 50% of project cost, grant or capped equity
ATMP/OSAT unit	India Semiconductor Mission (ISM)	ISM	Up to 50% of project cost, pari-passu grant
Electronic component, sub-assembly or specialty material manufacturing	Electronics Components Manufacturing Scheme (ECMS)	Ministry of Electronics and Information Technology (MeitY)	20% to 25% capex, plus 4% to 8% turnover-linked incentive
Fabless chip design	Design Linked Incentive (DLI) scheme	Centre for Development of Advanced Computing (C-DAC), under MeitY	Up to 50% of design cost (capped at ₹15 crore) plus 4% to 6% of net sales for five years

Is ISM the same thing as a semiconductor PLI scheme

No, and this distinction matters for how the incentive is negotiated. ISM support is formally the Modified Programme for Development of Semiconductors and Display Manufacturing Ecosystem, structured as a pari-passu capital grant or government equity capped at 49%, negotiated project-by-project by the Expenditure Finance Committee. It is not a standard Production Linked Incentive tied to a fixed percentage of incremental sales, unlike the electronics hardware PLI schemes that preceded it.

Is SPECS still open? No. SPECS offered a flat 25% capital expenditure subsidy for electronic components and closed to new applications on 31 March 2024. It has not been renotified. A component manufacturer filing today applies under ECMS, which replaced it from April 2025 with a hybrid capex and turnover-linked structure, an important correction since a large share of online guidance still lists SPECS as a currently open scheme.

India Semiconductor Mission: eligibility and incentive structure

ISM 1.0 ran on a ₹76,000 crore outlay notified in December 2021. By July 2026, the Union Cabinet had cleared twelve manufacturing units with cumulative committed investment above ₹1.64 lakh crore: one silicon fab, one silicon carbide fab, an integrated gallium nitride micro LED display fab and nine packaging units. Three units had begun commercial production, though the first full silicon fab, built through a domestic promoter’s technology licensing partnership with an overseas foundry, is not scheduled to commission before 2028.

ISM 2.0, cleared by the Union Cabinet on 15 July 2026 with a ₹1,27,500 crore outlay, widens the mandate beyond fabs and packaging to semiconductor manufacturing equipment, specialty materials, electronic-grade chemicals, industrial gases, full-stack chip design IP and workforce development, while continuing disbursements to the ISM 1.0 pipeline (Union Budget 2026-27, Part B).

ISM’s Project Appraisal Committee evaluates every application against four criteria before recommending it forward:

• A credible technology partnership with an established semiconductor company, the pattern followed by every fab and OSAT project approved so far.
• Financial capacity to fund the applicant’s own share of a capital-intensive project, since fab investments run into tens of thousands of crores.
• Realistic demand validation, backed by committed off-take agreements or clear market sizing rather than aspirational projections.
• For fab proposals specifically, a technology upgrade roadmap showing a credible path to more advanced process nodes over time.

Table: ISM incentive structure by facility type

Facility type	Fiscal support	Structuring mode	Support tenure
Silicon or compound semiconductor fab	Up to 50% of project cost	Pari-passu grant or GoI equity, capped at 49%	Six years, extendable with ministerial approval
Display fab	Up to 50% of project cost	Pari-passu grant	Six years
ATMP/OSAT packaging unit	Up to 50% of project cost	Pari-passu grant	Six years
Compound semiconductor and advanced packaging	Up to 50% of project cost	Pari-passu grant	Six years

Once the Expenditure Finance Committee, chaired by the Secretary, Department of Expenditure, has examined the financial structure and negotiated the quantum, individual proposals are routed to the Union Cabinet for final approval, since the disbursement draws on funds beyond delegated departmental limits. Cabinet approvals through 2025 and 2026 have come in periodic batches rather than a continuous pipeline, four projects cleared in one round, two more in a subsequent round.

Design Linked Incentive scheme for fabless design

DLI, notified in the Gazette of India on 21 December 2021, targets chip design rather than manufacturing capacity. It is implemented by MeitY through C-DAC and covers the full design lifecycle, integrated circuits, chipsets, systems-on-chip, systems and IP cores, for startups (as recognised under the 2019 DPIIT notification), MSMEs (per the 2020 MSME notification) and domestic companies majority-owned by resident Indian citizens under the extant FDI policy.

DLI carries two incentive layers, and each has its own eligibility test:

1. Product Design Linked Incentive: reimbursement of up to 50% of eligible design expenditure, capped at ₹15 crore per application, available once the design is demonstrated in an operational environment and ready for volume production.
2. Deployment Linked Incentive: 4% to 6% of net sales turnover for five years, capped at ₹30 crore per application, contingent on commercial deployment in an electronic product and on meeting a minimum cumulative net sales threshold of ₹1 crore for startups and MSMEs and ₹5 crore for other domestic companies across the five-year window.

Applicants must retain domestic ownership status for at least three years after receiving incentives. A company that misses the net sales threshold in a given year forfeits that year’s Deployment Linked Incentive but can requalify in a later year within the scheme tenure. Because DLI addresses the design stage, it sits upstream of, and separately from, ISM and ECMS: a fabless design house that later contracts an ISM-approved fab or OSAT unit for fabrication does not reapply under ISM for the same product, and a manufacturing unit applying under ISM or ECMS cannot separately claim DLI’s design incentives on that unit’s own capital expenditure.

Foreign companies cannot apply directly under DLI. A foreign design house must incorporate an Indian subsidiary meeting the ownership and domestic design activity conditions before it becomes eligible.

ECMS: the live scheme for component manufacturers, replacing SPECS

SPECS offered a flat 25% capex subsidy for electronic components, semiconductors and specified facilities such as e-waste recycling, with minimum investment thresholds ranging from ₹2 crore to ₹1,000 crore depending on target segment, and benefits payable for up to five years from acknowledgment. Its application window, open since 1 April 2020, closed on 31 March 2024 and was not renewed.

ECMS, notified in April 2025 with a baseline outlay of ₹22,919 crore and revised to ₹40,000 crore in Budget 2026-27, runs a hybrid model:

• Capex-linked incentive: 20% to 25% direct capital subsidy on eligible plant, machinery, tools, clean rooms, IT systems and R&D expenditure. Land and building costs are excluded from the eligible base.
• Turnover-linked incentive: 4% to 8% based on incremental sales for target segments such as display modules, camera modules and multilayer printed circuit boards, over a six-year tenure with one optional gestation year.
• A portion of both incentive streams is tied to incremental employment generation, and disbursement follows a first-come, first-served basis for applicants ready for early production.

Both greenfield and brownfield projects qualify, and any Indian company or LLP manufacturing an eligible component segment can apply, though the FDI and entity considerations discussed earlier still favour a private limited company for a project of scale. Application windows run in tranches by target segment: Segments A, B and C opened from 1 May 2025 and were extended to 30 September 2025; Segment D remains open until 30 April 2027 for applicants investing ₹10 crore or more in electronics machinery, components and capital goods manufacturing.

Table: SPECS versus ECMS

Feature	SPECS (closed)	ECMS (live)
Incentive type	Flat 25% capex subsidy	Capex (20% to 25%) plus turnover-linked (4% to 8%)
Application status	Closed since 31 March 2024	Open in tranches; Segment D open till 30 April 2027
Minimum investment	₹2 crore to ₹1,000 crore by segment	Varies by segment; Segment D from ₹10 crore
Employment linkage	Not built in	Portion of incentive tied to job creation
Land and building	Included in some segment calculations	Excluded from eligible capex

Ecosystem notes: the C2S talent pipeline, and ATMP versus OSAT

A manufacturing unit does not apply under Chips to Start-up (C2S), but any promoter building a design or ATMP workforce strategy should know it exists, since it feeds the design talent that DLI-funded and ISM-funded units eventually hire from. C2S is an umbrella capacity-building initiative launched by MeitY in 2022 with a ₹250 crore outlay over five years, implemented through C-DAC’s ChipIN Centre in Bengaluru. It gives academic institutions, startups and MSMEs shared access to commercial Electronic Design Automation (EDA) tools, high-performance computing and IP libraries that would otherwise be unaffordable, aggregates verified student and startup chip designs for shared wafer runs fabricated at the Semi-Conductor Laboratory (SCL), Mohali, and targets training 85,000 VLSI and embedded systems professionals, incubating 25 startups and enabling 10 technology transfers over the programme’s tenure. Nearly 400 organisations, roughly 305 academic institutions and 95 startups, were engaged as of early 2026. For a fabless design applicant preparing a DLI filing, prior C2S participation is a credibility signal in the DPR, since it demonstrates an already-verified design workflow.

The two back-end terms also get used interchangeably in most project literature, though they describe different things. ATMP, Assembly, Testing, Marking and Packaging, is the process: dicing a fabricated wafer, wire bonding, encapsulating and testing the resulting chip. OSAT, Outsourced Semiconductor Assembly and Test, is the business model: a facility that performs ATMP as a paid service for third-party fabless or IDM (integrated device manufacturer) clients rather than for its own captive chip production. A company packaging its own group’s chips is doing ATMP; a company packaging chips for outside clients is an OSAT provider. Both qualify for identical ISM support, so the distinction affects the applicant’s revenue model and client contracts, not its scheme eligibility.

Equipment, funding stack and risk factors to price in before filing

A fab’s capital expenditure is dominated by imported process equipment, photolithography systems, dry and wet etchers, ion implanters, chemical vapour deposition (CVD) tools and metrology instruments, sourced overwhelmingly from a small set of global equipment manufacturers concentrated in a handful of jurisdictions. An ATMP or OSAT unit needs a comparatively lighter stack, wire bonders, dicing saws, moulding and test handlers, shortening both procurement lead time and build timeline relative to a fab. Raw material dependency is the recurring operating risk across every segment: silicon wafers, specialty process gases, photoresists and high-purity chemicals are sourced internationally and subject to global price and supply volatility, and a DPR that assumes flat input costs across the support tenure understates working capital risk. Capital equipment imported for an eligible project generally qualifies for concessional or nil basic customs duty under the relevant sector notification, but this exemption is claimed through the IEC and customs classification process at the time of import, not automatically through scheme approval.

Government fiscal support under ISM, DLI or ECMS covers a defined share of eligible cost; the remainder has to be arranged independently, and the mix differs by segment. Foreign direct investment, under the 100% automatic route discussed earlier, remains the primary equity source for fabs and OSAT units with an overseas technology partner. Venture capital and private equity are more active at the fabless design stage, given its lower capital intensity and faster path to a saleable IP asset, and DLI-approved design companies tend to see stronger investor interest since scheme approval functions as a form of technical due diligence already performed by C-DAC. Project finance and structured debt carry the bulk of large fab and OSAT capital structures, and a signed Financial Support Agreement materially improves debt serviceability calculations for lenders, since it fixes a portion of the capital stack against verified milestones. DPIIT Startup India recognition, where the entity separately qualifies, adds a three-year income tax holiday under Section 80-IAC, and SIDBI’s Fund of Funds for Startups provides indirect equity support through SEBI-registered AIFs, a route more relevant to design and component-stage ventures than fab-scale structures.

Four risk factors deserve a specific line in the plan rather than a general caveat: talent availability at the experienced fab-engineer and cleanroom-technician level, which remains scarce regardless of India’s large design engineering base; infrastructure reliability, since fabs need near-continuous power and ultra-pure water and a single unplanned outage can damage an in-process wafer lot; the long capital cycle, typically three to four years to build, a further one to two years to ramp, and five to seven years to full return; and export control exposure on advanced process equipment and certain node technologies, which needs to be checked against the technology partnership agreement before it is finalised, not after equipment procurement has begun.

Ongoing compliance after the unit is commissioned

Scheme approval and statutory clearances get a unit built; a separate, recurring compliance calendar keeps it running and keeps the incentive flowing.

Table: post-commissioning compliance calendar

Compliance area	Filing or event	Frequency
Corporate (MCA)	AOC-4 (financial statements) and MGT-7 (annual return)	Annual, within 30 and 60 days of the AGM respectively
Corporate governance	Board meetings; Annual General Meeting	Minimum four board meetings a year, gap not exceeding 120 days; AGM within six months of financial year end
Statutory audit	Financial statement audit	Annual
GST	GSTR-1 and GSTR-3B; annual return GSTR-9	Monthly; annual by 31 December
TDS	TDS deposit and quarterly return (Forms 24Q, 26Q)	Monthly deposit by the 7th; quarterly return
Income tax	Annual return, tax audit where applicable	Annual, by 31 October for audited entities
Transfer pricing	Form 3CEB and supporting documentation, where the unit transacts with a foreign group entity, common in fab and OSAT joint ventures	Annual
Environmental	Periodic compliance reports to the State Pollution Control Board and, where applicable, the Ministry of Environment, Forest and Climate Change	Half-yearly and annual
Factory	Factory licence renewal, safety audits, labour welfare fund contributions	Annual
Scheme-specific	Capital expenditure and, where relevant, employment and turnover milestone reports to ISM, MeitY or C-DAC	Quarterly or annual, per the FSA or scheme agreement

Missing a scheme-specific milestone report is the compliance failure with the sharpest financial consequence: it does not merely attract a penalty, it can pause disbursement for the entire reporting quarter until the report is filed and verified, directly affecting project cash flow.

State incentives that stack on top of the central scheme

Central scheme approval is only half the fiscal picture. States compete actively for semiconductor and electronics investment, and their incentives generally stack on top of ISM, DLI or ECMS support, subject to each state policy’s own conditions.

• Gujarat, the first state with a dedicated Semiconductor Policy (2022 to 2027), offers a capital subsidy of up to 40% in addition to central incentives, full reimbursement of stamp duty and registration fees, concessional power and water tariffs, and a land subsidy of up to 75% for the first 200 acres in its designated semiconductor zone, tapering to 50% for additional acreage.
• Tamil Nadu’s Semiconductor and Advanced Electronics Policy 2024 offers up to 50% additional financial incentive on top of the Centre’s support, alongside stamp duty, land and electricity concessions, and has earmarked dedicated semiconductor and equipment manufacturing parks in two industrial belts.
• Karnataka’s Electronics System Design and Manufacturing (ESDM) policy provides capital subsidies of up to 10%, R&D grants, patent reimbursements and power tariff concessions, positioned around its design and equipment ecosystem.
• Uttar Pradesh’s 2024 semiconductor policy offers a 50% additional capital subsidy and a full State GST exemption for up to 10 years, anchoring an approved display driver chip packaging unit in its industrial development authority area near the state’s upcoming international airport.
• Odisha offers roughly 30% of capex as state-level support and has processed two ISM-approved projects through its own single window system following MoUs signed at a state investor conclave.
• Assam, hosting an approved ATMP facility, pairs competitive land and power packages with state-level skills training partnerships.

One structural point promoters miss: a Gujarat policy document confirms that projects approved under DLI are not eligible for Gujarat’s state semiconductor incentive, though they can access other applicable state benefits, illustrating that state and central scheme stacking rules have to be checked scheme-by-scheme rather than assumed uniformly across states.

The complete approval sequence, from DPR to first disbursement

Founders tend to treat scheme approval as a single event. It is a chain of distinct steps, and the central scheme approval sits in the middle of that chain, not at the start.

1. Entity incorporation and technology partner confirmation. Incorporate the applicant entity, or confirm an existing entity’s eligibility, under the Companies Act 2013 through the SPICe+ form, which bundles PAN, TAN, GST registration, EPFO and ESIC registration into one filing. For ISM proposals, finalise the technology partner before filing, since the Project Appraisal Committee treats this as a threshold criterion, not a preference to be resolved later.

2. Post-incorporation registrations. Complete GST registration, apply for an Importer Exporter Code (IEC) for capital equipment and specialty gas imports, and register on the Udyam portal if the entity qualifies as an MSME, which matters directly for DLI eligibility. DPIIT startup recognition is relevant only if the applicant intends to use DLI’s startup-category eligibility route.

3. Site identification and state MoU. Most states route large semiconductor and electronics proposals through an investor conclave or industry summit, where a Memorandum of Understanding is signed with the state government. Odisha’s own account of its two ISM-approved projects confirms the order: MoUs signed at the conclave, single window clearance issued, then the file goes to the Centre.

4. State single window clearance. Running concurrently with the MoU process, single window clearance covers land allotment through the relevant state industrial development authority, power and water allocation, and consent to establish from the State Pollution Control Board. Since June 2025, the Department of Commerce has eased Special Economic Zone (SEZ) rules for semiconductor and electronics units specifically, reducing the minimum land requirement for a dedicated SEZ from 50 hectares to 10 hectares and relaxing the encumbrance-free land condition, making an SEZ route more accessible for mid-sized ATMP or component projects than it was before 2025.

5. Detailed Project Report and central application. File the DPR through the relevant portal, ism.gov.in for ISM proposals, chips-dli.gov.in for DLI, and the ECMS portal for component manufacturing. The DPR needs to cover technology, financing structure, demand assumptions and, for ISM fab proposals, a node-upgrade roadmap.

6. Technical and financial appraisal. For ISM, the Project Appraisal Committee reviews the technology and commercial case, after which the Expenditure Finance Committee examines the financial structure and negotiates the final support quantum. For ECMS and DLI, appraisal is conducted departmentally by MeitY and C-DAC respectively against published eligibility criteria, without an individual EFC reference, since the scheme’s overall outlay was pre-cleared at scheme level.

7. Union Cabinet approval, for ISM proposals only. Because ISM disbursements draw on funds requiring Cabinet sanction beyond delegated departmental limits, individual fab, compound semiconductor and OSAT proposals go to the Union Cabinet for final approval, in periodic batches rather than continuously. ECMS and DLI approvals do not require this step, since ministry-level sanction operates under the pre-approved scheme envelope.

8. Execution of the Financial Support Agreement or scheme agreement. Once approved, ISM executes a Financial Support Agreement (FSA) between ISM, the applicant company and the relevant state government, fixing the incentive quantum, milestones and disbursement schedule. ECMS and DLI approvals are formalised through a scheme agreement or sanction letter specifying claim periods and documentation requirements.

9. Land conversion and building plan approval. Before any civil construction, the site needs land use conversion or non-agricultural (NA) permission where the land was not already zoned industrial, and building plan approval from the local municipal corporation or the relevant state industrial development authority, which reviews the cleanroom and civil layout against fire, structural and industrial safety norms before issuing a construction permit.

10. Consent to establish, then construction. Consent to establish (CTE) from the State Pollution Control Board has to be in hand before civil work begins, not merely before commissioning. Construction proceeds only after CTE, building plan approval and, where the project is large enough to trigger the notified thresholds, environmental clearance from the State Environment Impact Assessment Authority (SEIAA) or, for larger Category A projects, the Expert Appraisal Committee at the Ministry of Environment, Forest and Climate Change, following the standard screening, scoping and public hearing stages under the Environment Protection Act 1986.

11. Utility connections and hazardous materials licensing. Power and water connection applications are filed with the state distribution utility and water board once building plan approval is secured, and typically run in parallel with equipment procurement. Fabs and any unit storing specialty process gases (silane, arsine, phosphine and similar) additionally need a licence from the Petroleum and Explosives Safety Organisation (PESO) under the Explosives Act 1884 and the Gas Cylinder Rules, sequenced before those gases are brought on site, and separate from the State Pollution Control Board’s hazardous chemical handling authorisation under the Hazardous Chemicals Rules 1989.

12. Statutory and sectoral clearances before construction concludes. Running alongside steps 9 to 11, the unit needs the ordinary manufacturing clearances that have nothing to do with the incentive scheme: factory licence and stability certificate under the Factories Act 1948, fire safety NOC from the state fire department, and labour registrations, Shops and Establishment registration, EPFO and ESIC coverage, and a contract labour licence under the CLRA where contract workforce is engaged during construction and commissioning. None of these are waived by scheme approval.

13. Consent to operate and commencement of production. Consent to operate (CTO) from the State Pollution Control Board follows an operational Effluent Treatment Plant (ETP) and is the last statutory clearance before commercial production can legally begin. A unit manufacturing electronic components also needs to confirm applicable Bureau of Indian Standards (BIS) Quality Control Order (QCO) compliance for its finished product before sale, separate from the factory-level clearances above.

14. Milestone-linked disbursement. ISM releases funds against verified capital expenditure milestones under the FSA, never as a single payout. ECMS pays capex and turnover incentives on a claims basis, typically quarterly, against documented spend and audited sales figures for the turnover component. DLI’s deployment incentive is paid annually against net sales thresholds, and a missed year simply forfeits that year’s claim.

Statutory and environmental clearances the scheme approval does not replace

A Cabinet-approved, FSA-signed project cannot legally begin construction, let alone commercial production, without the sequence of licences below, and delays here run entirely independent of scheme timelines.

Table: manufacturing clearance sequence against project stage

Project stage	Clearance required	Issuing authority
Before land is acquired or converted	Land use conversion or NA permission	State revenue department or industrial development authority
Before civil construction begins	Building plan approval; Consent to Establish (CTE)	Local municipal body or industrial development authority; State Pollution Control Board
Before construction begins, where thresholds apply	Environmental clearance following screening, scoping and public hearing	SEIAA, or MoEFCC’s Expert Appraisal Committee for Category A projects
During construction, before equipment installation	Power and water connection; PESO licence for specialty gas storage	State distribution utility and water board; Petroleum and Explosives Safety Organisation
Before commissioning	Factory licence and stability certificate; fire safety NOC; ETP construction complete	State labour department (Factories Act 1948); state fire department; State Pollution Control Board
Before commercial production	Consent to Operate (CTO); labour registrations (Shops and Establishment, EPFO, ESIC, CLRA where applicable)	State Pollution Control Board; respective labour authorities
Before sale of finished product	GST registration; IEC for ongoing imports; BIS QCO compliance for components, where applicable	GST authorities; DGFT; Bureau of Indian Standards

Common mistakes that cost promoters time and money

Filing under SPECS instead of ECMS. SPECS closed to new applicants on 31 March 2024. DPRs still built around a flat 25% capex subsidy under SPECS terminology get redirected to ECMS at the appraisal stage, costing several months of avoidable rework.

Calling ISM support a PLI scheme in investor or lender documentation. ISM’s fiscal support is a negotiated pari-passu grant or capped equity structure decided by the Expenditure Finance Committee, not a formulaic Production Linked Incentive against incremental sales. Term sheets and financial models that describe it as a standard PLI misstate both the mechanism and the negotiation process involved.

Starting construction before consent to establish is in hand. Beginning civil work or importing capital equipment ahead of the State Pollution Control Board’s consent to establish risks stop-work directions and, on repeat instances, penalty proceedings under the Water Act 1974 and Air Act 1981, entirely independent of any scheme-level clearance already obtained.

Assuming Cabinet approval equals fund release. A Cabinet nod authorises the project for support; actual disbursement follows only after the FSA is signed and capital expenditure milestones are independently verified. Promoters who schedule vendor payments against the Cabinet approval date rather than the FSA milestone date routinely run into working capital gaps.

Treating DLI and ISM as interchangeable. DLI funds design work; it does not fund fabrication or packaging capacity, and a design house cannot use DLI incentives to offset OSAT or fab costs. Conflating the two in a business plan sent to investors creates a credibility problem at the first term sheet discussion.

Assuming every state incentive stacks automatically with every central scheme. Gujarat’s own policy documentation excludes DLI-approved projects from its state semiconductor incentive, even though such projects remain eligible for other state benefits. Stacking rules need to be checked scheme-by-scheme and state-by-state, not assumed.

What Treelife sees across live semiconductor and electronics manufacturing engagements

In the manufacturing incentive engagements we have run at Treelife, the single most common structuring error is sequencing the state MoU and the central scheme application as if they were independent tracks. They are not. States now insist on single window clearance being substantially complete before they will support a Cabinet reference for an ISM proposal, because the state’s own contribution, land, power tariff concessions, sometimes a matching capital grant, has to be committed in the same file the Centre reviews. A promoter who signs a state MoU at an investor summit but delays the single window application by even eight to ten weeks routinely pushes back the entire Cabinet approval timeline by a full quarter, since the appraisal committee will not recommend a proposal with an incomplete state-side commitment.

The second pattern is around FDI documentation for wholly foreign-owned units. Because 100% FDI is automatic route with no prior approval required, promoters sometimes treat the FC-GPR filing as a formality to be handled after the plant is operational. RBI compliance teams increasingly flag delayed FC-GPR filings at the time of the first ISM disbursement verification, since the FSA counterparty structure assumes the equity has been reported in the ordinary course. Filing FC-GPR within the 30-day window from allotment, well before any scheme milestone review, avoids this friction entirely.

Frequently asked questions

Q: Is SPECS still open for new applications in 2026?
A: No. SPECS closed to new applicants on 31 March 2024 and has not been renotified. A new component manufacturing unit should apply under ECMS, which offers a comparable capex-linked incentive alongside a turnover-linked layer.

Q: What is the difference between ISM and DLI?
A: ISM funds physical manufacturing capacity, fabs, compound semiconductor units and packaging facilities, with up to 50% project cost support. DLI funds fabless chip design work through reimbursement of design expenditure and a deployment-linked turnover incentive. They address different value chain stages and are not interchangeable.

Q: How long does ISM approval take from application to Cabinet clearance?
A: There is no statutory timeline, and Cabinet approvals through 2025 and 2026 have come in periodic batches rather than continuously. Applicants with a finalised technology partner, complete state single window clearance and a demand-validated DPR have moved through Project Appraisal Committee and EFC review faster than those filing with any of the three still pending.

Q: Does 100% foreign ownership require prior approval for a semiconductor manufacturing unit?
A: No. Semiconductor and electronics manufacturing sits under the automatic route for 100% FDI with no sectoral cap (Consolidated FDI Policy, paragraph 5.2.26). The obligation is post-facto FC-GPR reporting under FEMA 1999, not prior government approval.

Q: Can an ISM-approved unit also claim ECMS incentives?
A: Not for the same capital expenditure. Each scheme’s guidelines disallow overlapping claims on identical assets. A group with both a fab (ISM) and a separate components line (ECMS) can claim under both for their respective, distinct capex.

Q: What state-level clearances are needed alongside the central scheme approval?
A: Land allotment through the state industrial development authority, power and water allocation, and consent to establish from the State Pollution Control Board, typically processed through the state’s single window system in parallel with the central DPR review, not after it.

Q: Is DPIIT startup recognition required to apply under DLI?
A: Only for applicants using the startup-category eligibility route. DLI separately admits MSMEs under the 2020 MSME notification and other domestic companies meeting the FDI ownership criteria, so DPIIT recognition is one qualifying path, not a universal requirement.

Q: What happens if a DLI applicant misses the net sales threshold in a given year?
A: The applicant forfeits that year’s Deployment Linked Incentive but remains eligible to requalify in a subsequent year within the scheme’s five-year tenure, provided the design remains deployed and future thresholds are met.

Q: Does the manufacturing unit need an industrial licence before construction?
A: Electronics and semiconductor manufacturing is largely delicensed under current industrial policy, but the unit still needs a factory licence and stability certificate under the Factories Act 1948, environmental clearance where applicable, and GST registration before commencing commercial operations.

Q: Can a foreign OSAT or ATMP company set up a wholly-owned Indian subsidiary to apply for ISM?
A: Yes. A wholly foreign-owned Indian subsidiary can apply under ISM in its own right, subject to the same technology partnership, financial capacity and demand validation criteria applied to any other applicant, and subject to standard FC-GPR reporting on the equity infusion.

Q: Do state incentives automatically stack with central scheme benefits?
A: Not automatically. Stacking rules vary by state and by scheme. Gujarat’s own policy documentation, for example, excludes DLI-approved projects from its state semiconductor incentive while allowing them access to other applicable benefits, so each combination needs to be checked against the specific state policy.

Q: What changed in the Special Economic Zone rules for semiconductor units in 2025?
A: The Department of Commerce reduced the minimum land requirement for a dedicated semiconductor or electronics component SEZ from 50 hectares to 10 hectares from June 2025, and relaxed the requirement that SEZ land be entirely encumbrance-free, making the SEZ route more accessible for mid-sized ATMP or component projects.

Q: Is ISM’s fiscal support the same as a Production Linked Incentive?
A: No. ISM support is structured as a pari-passu capital grant or capped government equity, negotiated project by project through the Expenditure Finance Committee, rather than a formulaic percentage tied to incremental sales as under a standard PLI scheme.

Q: What is the current outlay for ECMS after the 2026-27 Budget revision?
A: ₹40,000 crore, revised upward from the original ₹22,919 crore notified in April 2025, reflecting investment commitments already running at roughly double the scheme’s initial target.

Q: Are land and building costs eligible for the ECMS capex incentive?
A: No. ECMS capex incentives cover plant, machinery, tools, clean rooms, IT systems and R&D expenditure. Land and building costs are explicitly excluded from the eligible capex base.

Q: What is ISM 2.0 and how is it different from ISM 1.0?
A: ISM 2.0, approved by the Union Cabinet on 15 July 2026 with a ₹1,27,500 crore outlay, extends ISM support beyond fabs and packaging to semiconductor manufacturing equipment, specialty materials, full-stack chip design IP and supply chain resilience, while continuing disbursements to the ISM 1.0 project pipeline.

Q: Which states offer the strongest incentives for a new semiconductor or electronics unit?
A: Gujarat leads with up to 40% additional capital subsidy and up to 75% land subsidy in its designated semiconductor zone; Tamil Nadu offers up to 50% additional incentive under its 2024 policy; Uttar Pradesh offers a 50% additional capital subsidy and a ten-year State GST exemption; Karnataka focuses incentives around its design and equipment ecosystem. The right fit depends on facility type and site logistics, not incentive rate alone.

Q: What is the Chips to Start-up (C2S) programme and does a manufacturing unit need to apply under it?
A: C2S is a MeitY capacity-building programme run through C-DAC’s ChipIN Centre, giving academic institutions, startups and MSMEs shared access to EDA tools and shared wafer fabrication runs. A manufacturing unit does not apply under it directly, but it is the talent and design-verification pipeline that feeds DLI applicants and, eventually, ISM-linked fab and OSAT hiring.

Q: Is ATMP the same thing as OSAT?
A: Not quite. ATMP (Assembly, Testing, Marking and Packaging) describes the process; OSAT (Outsourced Semiconductor Assembly and Test) describes the business model of performing that process for third-party clients rather than a captive parent. Both qualify for identical ISM fiscal support.

Q: What manufacturing-specific approvals come before Consent to Establish?
A: Land use conversion or non-agricultural permission where the site is not already zoned industrial, followed by building plan approval from the local municipal body or industrial development authority. Consent to Establish from the State Pollution Control Board has to be secured before civil construction begins, not merely before commissioning.

Q: Does a semiconductor fab need a separate licence for the specialty gases it uses?
A: Yes. Beyond the State Pollution Control Board’s hazardous chemical handling authorisation, storage of specialty process gases such as silane, arsine or phosphine requires a licence from the Petroleum and Explosives Safety Organisation (PESO) under the Explosives Act 1884 and Gas Cylinder Rules, sequenced before those gases are brought on site.

Regulatory references:

• India Semiconductor Mission, MeitY Notification S.O. 4583(E), 21 December 2021, and Modified Programme, September 2022
• Design Linked Incentive Scheme, Gazette notification CG-DL-E-21122021-232049, 21 December 2021
• Scheme for Promotion of Manufacturing of Electronic Components and Semiconductors (SPECS), notified 1 April 2020, application window closed 31 March 2024
• Electronics Components Manufacturing Scheme (ECMS), MeitY, notified April 2025, revised outlay per Union Budget 2026-27
• Union Budget 2026-27, Part B, announcement of India Semiconductor Mission 2.0
• Consolidated FDI Policy, paragraph 5.2.26, on 100% automatic route FDI in electronics and semiconductor manufacturing
• Foreign Exchange Management Act 1999 and FEMA 20(R), Regulation 4, on FC-GPR reporting
• Special Economic Zones Rules, amendment effective June 2025, on reduced minimum land area for semiconductor and electronics component SEZs
• Factories Act 1948; Water (Prevention and Control of Pollution) Act 1974; Air (Prevention and Control of Pollution) Act 1981; Environment Protection Act 1986; Hazardous Chemicals Rules 1989
• Explosives Act 1884 and Gas Cylinder Rules, administered by the Petroleum and Explosives Safety Organisation (PESO), for specialty process gas storage and handling
• Companies Act 2013, SPICe+ integrated incorporation framework